Sessions Index

Bio:

Chieh-Sen Lee received the Ph.D. degree in Electrical Engineering from National Cheng Kung University in Tainan, Taiwan, in 2015. He joined Elite Material Co., Ltd in Taiwan as an Assistant Manager in 2022, where he has been involved in projects related to CCL (Copper Clad Laminate) materials for signal integrity analysis, high-speed circuit design for commercial products, and the development of signal integrity test vehicles for high-frequency operations. He has published over 10 IEEE Transactions Journal papers as the first author on topics related to microwave technology.

Abstract:

AI Driving Demand for CCL Materials 

EMC’s Technology-Aligned CCL Portfolio 

Key Design Parameter : Dk

AI-Driven Performance Leader : EM-896 Series

 

Bio:
Joe Hasty is the Engineering Manager for the Flex product line at MKS Inc., where he leads multidisciplinary teams developing advanced laser drilling systems for the PCB industry. Approaching his 20-year anniversary at ESI and MKS, Joe has contributed to the development of flagship machine models such as CapStone, 5335, and RedStone. His background spans systems design, software engineering, and data-driven innovation, including holding multiple patents and a trade secrets. Joe’s current focus is the SPOT ON feature for ESI's CapStone Flex PCB laser drill machines, where he is driving efforts to harness large-scale sensor data and analytics, combined with real-time machine control, to unlock new capabilities, improved quality, and reliability in precision manufacturing. A graduate of Texas A&M University, Joe brings a global perspective shaped by his early years in Tokyo and a lifelong passion for technology. Outside of work, he enjoys soccer, music, and exploring the Pacific Northwest.

Abstract:
The ESI brand has historically dominated the flexible printed circuit board (FPCB) blind via hole (BVH) drilling market by continuously developing cutting-edge technology to enable superior throughput, quality, and yield for high-volume manufacturing (HVM). SPOT ON, a recent technological advancement, is now available as an upgrade for the flagship CapStone product line to deliver even higher yields. Additional benefits include potential increases in throughput, due to decreased dependency on large process windows, and reductions in system downtime, due to a more predictive assessment of beam path degradation over time.

SPOT ON consists of three complementary subsystems: a Beam Characterization Tool (BCT), a Z-height mapping system, and real-time Z-height control. Together, they enable the CapStone to dynamically maintain ideal laser focus during processing.

The BCT is an automatic beam measurement system utilizing knife-edge scans of the focused beam at the chuck. The data gathered describes beam waist location and shape in the X,Y and Z axes. This data is then used to calculate ideal focus, spot roundness, and spot size at the work surface.

The Z-height mapping system employs a capacitance probe to map the work surface. The scanning can be limited to a single map of the system chuck during calibration or expanded to characterize the topology of each panel prior to processing. Preliminary data suggests that significant improvement comes from the chuck calibration alone with no impact to throughput.

Realtime Z-height implements next generation control of the stock Z-stage and motor to smoothly position the focus height to the topology of the workpiece.

Traditional HVM processes rely on large process windows (+/-500um) to maximize yield. This need is due, in part, to a large Z-height budgets comprised of inputs from variations in chuck height, overlays/fixturing, workpiece thickness. ESI legacy systems are designed assuming budgets of hundreds of microns. With the SPOT ON upgrade, CapStone systems can now control focus location to within tens of microns. Large process windows could be a thing of the past and current processes times could be reduced to achieve comparable yields.

Traditional preventative maintenance schedules of laser via drilling systems are based on estimates drawn from statistical data. Greater control and precision can now be achieved with SPOT ON by monitoring beam path health at a configurable cadence without the need for invasive measurements resulting in downtime and loss of productivity.

 

Bio:
Master's student in Professor Jenn-Ming Song's Laboratory, Department of Materials Science and Engineering, National Chung Hsing University, focusing on direct bonding research for advanced semiconductor packaging.

Abstract:
With the rapid advancement of 2.5D/3D IC packaging technologies, the demand for efficient bonding of organic materials has significantly increased. To enable vertical stacking and high-density integration, packaging interfaces must not only possess excellent mechanical stability and thermal conductivity but also satisfy process requirements such as low temperature and short duration. Polyimide (PI), due to its superior thermomechanical properties, electrical insulation, and process compatibility, has been widely adopted as a dielectric and passivation layer in advanced packaging. However, the high curing temperature and substantial thermal budget associated with conventional PI significantly limit its reliability and applicability in hybrid bonding processes. In particular, during low-temperature heterogeneous integration, the chemically inert surface of fully cured PI often leads to incomplete bonding or interfacial delamination, posing a major challenge for the realization of robust integration. In this study, a surface modification technique combining vacuum ultraviolet (VUV) irradiation under different atmospheric conditions, including nitrogen and ammonium hydroxide (NH₄OH), was proposed to tailor the surface chemistry and bonding mechanisms of highly cured PI. Experimental results indicate that VUV treatment effectively modulates the chemical functionality of the PI surface and enables high-strength PI-to-PI direct bonding under low processing temperature (220 °C), short duration (15 sec), and low bonding load conditions (1 MPa). VUV irradiations in N₂ induced phenyl condensation and decarbonylation on the PI surface, while those in NH₄OH led to the formation of amide functional groups, promoting enhanced intermolecular crosslinking and significantly improving bonding strength after thermal compression. Nevertheless, excessive atmospheric treatment leads to residual reactants on the surface and a substantial increase in surface roughness, thereby reducing the joint strength. Moreover, the bonding strength of the jointed samples subjected to post-annealing will be also investigated.

 

Bio:
2018 - 2025 Business Development Manager at RENA Technologies GmbH 2013- 2018 PhD Chemistry, Humboldt University zu Berlin, Max-Planck Institute of Colloid Chemistry and Surface Science 2009 - 2011 Master of Science, Chemiestry, EU-funded master program "Advanced Spectroscopy in Chemistry", University Leipzig Germany, University Lille France

Abstract:
Glass-core substrates are emerging as a next generation packaging substrates offering significant improvements over traditional organic-based substrates. These advancements address critical issues such as warpage, thermal management, and thermal expansion, among other challenges.
The glass panels utilized in new packaging substrates must incorporate a high density of micro-holes, known as through-glass vias (TGVs). These TGVs are subsequently filled with conductive materials, functioning as vertical interconnects for electrical signals or thermal management. The manufacturing process for TGVs, ranging from 30 to 150 micrometers in diameter, necessitates specialized fabrication technologies.
The predominant technique for creating vias involves laser-induced selective etching. This process entails the modification of the glass material via laser treatment, followed by an etching procedure. The laser modification alters the structural properties of the glass, resulting in differential etching rates between the modified regions and the unaltered material, thus enabling enhanced etching selectivity.
At the heart of these glass-core substrates is the glass itself. The possibility to change the CTE (coefficient of thermal expansion) of the glass is one of the biggest advantages of this material coupled with availability in different formats and dimensional stability. Variety of CTE of glasses needed leads to a range of glass types potentially suitable for this application. Each glass type evidences different behavior with respect to processing resulting in diverse types of vias which consequently impact properties of final product. Two extreme examples of this phenomena are straight and X-shape vias. The shapes of vias are significantly influenced by the etching process. Generally, there are two etching processes available for this application: acidic and alkaline etching Hydrofluoric acid (HF)-based etchants are typically used in this context, given their widespread application in conventional glass thinning processes. Although acidic processes are fast, they bring significant drawbacks to the via forms.
In this paper, we present an innovative etching technology based on special alkaline processes. This technology allows precise tuning of via forms. This advanced method achieves significantly higher selectivity compared to traditional acidic etching, while maintaining a processing time that is comparable. Our technology enables the creation of vias with precisely defined shapes and remarkably narrow taper angles, reaching below 1 degree. This is extremely important to achieve close positioning of vias and allows high density. Additionally we show reaction of different glass types to various etching conditions and based on that via form modulation
With our advanced alkaline etching solution combined with laser modification, we are able to manufacture high-density through glass vias (TGVs) substrates for emerging glass-core substrates market. This etching technology allows precise processing of all considered glass types and creating of high density vias for glass-core substrates.

 

Bio:
My name is Tzu-Hsiang Peng, and I am currently studying in the Department of Electronic Engineering at National Yunlin University of Science and Technology, under the supervision of Professor Shih-Hung Lin.

Abstract:
With the rapid advancement of 5G technologies and low Earth orbit (LEO) satellite systems, there is a growing demand for high-frequency, low-loss, and miniaturized circuit substrate materials. However, existing ceramic materials often face challenges such as high dielectric loss, bulky dimensions, and poor temperature stability at millimeter-wave frequencies, limiting their application in high-frequency PCB packaging. This study aims to develop novel microwave dielectric ceramics with optimized structural and dielectric properties that offer high thermal stability, low dielectric loss (low Df), and excellent temperature compensation. The goal is to enhance compatibility with PCB manufacturing and address the performance needs of next-generation high-frequency communication systems.
A-site substituted perovskite-type Na2-2xSrxTa2O6 ceramics were synthesized via conventional solid-state reaction routes, with x ranging from 0.05 to 0.3 and sintering temperatures between 1400 °C and 1500 °C. Structural characteristics were analyzed using XRD, GSAS refinement, SEM, EDS, density measurements, and Raman spectroscopy. The optimized composition at x = 0.1 sintered at 1475 °C exhibited εr = 179, Qf = 12,000 GHz, and τf = +555 ppm/°C, demonstrating high dielectric constant and positive temperature coefficient suitable for compensation. However, the Qf value remains insufficient for direct deployment in high-frequency PCB applications.
To address this limitation, MgTiO3—featuring negative τf—was incorporated to form a composite system. Guided by phase-mixing theory and the high positive τf of the host material, both temperature compensation and loss minimization were achieved. The resulting composite exhibited a significantly enhanced Qf exceeding 80,000 GHz with near-zero τf. More importantly, the sintering temperature was successfully reduced from 1500 °C to 1350 °C through composition and process optimization. This reduction lowers the thermal budget by over 10% and is estimated to cut approximately 1.4 kg of CO2 emissions per sintering cycle, demonstrating substantial potential for low-carbon processing aligned with sustainable PCB manufacturing.
Furthermore, based on the optimized dielectric parameters and a reference filter layout from a 2021 IEEE publication, a microstrip bandpass filter with a center frequency of 3.5 GHz was designed. Simulated and measured results were compared using both the developed MT–NST substrate and commercial substrates (Rogers 4003C, FR-4, and Al2O3). The MT–NST substrate demonstrated superior miniaturization, lower insertion loss, and enhanced frequency stability. With its high dielectric constant (high Dk) and low dielectric loss (low Df), the proposed ceramic substrate exhibits promising potential for high-frequency PCB modules, millimeter-wave communication systems, and LEO satellite applications.

 

Bio:
Department of Materials Science and Engineering, National Chung Hsing University, Taichung 402, Taiwan

Abstract:
A crucial technology for sophisticated electronic packaging is copper-to-copper (Cu–Cu) bonding, especially for uses like high-power devices and 3D integration. Effective Cu–Cu bonding is, however, restricted by two main issues: the development of surface oxides (Cu2O/CuO) and the existence of organic contaminants from handling or cleaning procedures. Weak, voided, or unreliable junctions are the result of these surface imperfections, which also decrease interfacial contact and stop atomic diffusion across bonded surfaces. In this work, we provide a methodical examination of the removal of organic and copper oxide impurities from copper thin film surfaces using formic acid (HCOOH) vapor treatment before thermo-compression bonding (TCB). In order to improve the reduction reaction, copper samples were treated with 1% formic acid vapor at 200°C under a variety of conditions, such as variable flow rates, treatment times, cooling rates, and the use of platinum (Pt) catalysts. To verify chemical alterations and morphological impacts, surface characterization was carried out using FTIR, Raman spectroscopy, XRD, and AFM. Shear strength testing was used to assess the efficacy of thermo-compression bonding. The removal of Cu–O peaks in Raman and XRD data shows that copper oxides are efficiently reduced to metallic Cu by formic acid treatment. The chemical cleaning method was supported by FTIR and Raman, which also verified the elimination of organic pollutants and the emergence of formate-related peaks. Increased roughness (from 1.75 nm to 4.97 nm) on treated surfaces was revealed by AFM analysis, which might affect the interdiffusion between two faying faces. This study offers compelling proof that Cu–Cu bonding strength and reliability may be greatly increased through targeted chemical pretreatment with formic acid, providing a viable path to improving interconnect quality in high-density and high-performance electronic devices.
Keywords: Formic acid vapor treatment, FTIR, Raman spectroscopy, AFM, Organic contamination, Copper-to-Copper (Cu–Cu) Bonding.

 

Bio:
I am Kun-Yuan Zeng a master degree student from National Cheng Kung University material science and technology department investigativeing Cu/SiO2 hybrid bonding and Cu/Cu bonding. My Bachelor's degree is from National Yang Ming Chiao Tung University material science and technology department investigation High entropy alloy's magnetism

Abstract:
The semiconductor industry is facing an increasing demand for electronic components with higher computing performance, lower latency, and greater energy efficiency. This is driven by the development of applications such as artificial intelligence (AI), high-performance computing (HPC), and 5G communication. Hybrid bonding is considered as a key solution to meet these kind of demands.
In hybrid bonding, dielectric-to-dielectric bonding (SiO2-SiO2 bonding) occurs via a dehydration reaction, which create a high temperature and high relative humidity environment let the native copper oxide can easily growth on the copper surface. Additionally, due to different queue time in the production line, nano scale native copper oxide inevitably forms on the copper surfaces make the surface morphology becomes even worse. Therefore, in hybrid bonding process when dielectric-to-dielectric bonding (SiO2-SiO2 bonding) is finishing, and start to performing metal-to-metal bonding (Cu-Cu bonding), the native copper oxide will be exist on top of the copper surface. As a material perspect the ceramic material has a lower electrical conductivity, so that if the native oxide is still exist at the bonding interface it will make device has some serious issue such as Heat dissipation, Poor electrical conductivity and Yield problem. Therefore understanding the evolition mechanism of copper oxide during Cu/SiO2 hybrid bonding is critical.
This study explore critical copper native oxide problem in chip-level bonding structures for heterogeneous integration in microelectronics, focusing on Cu-Cu and Cu/SiO2 hybrid bonding. After the Cu-Cu bonding model was bonded at different temperature, bonding pressure, queue time, native oxide thickness and bonding duration in nitrogen atmosphere, the analysis of transmission electron microscope (TEM) were performed for the bonded structures to explore the bonding behavior of copper oxide evolution during different stage of the thermal compression bonding process(TCB).The result indicated that the copper oxide will become the isolated island structure at the bonding interface between Cu grain, which is transform from thin film structure Cu native oxide at the initial bonding stage in the begining. After the isolated island structure stage the copper island will decompose and dissolute in copper grain and grain boundary remain a void at the bonding interface at above 523K. Futhermore the analysis of Electron Backscatter Diffraction(EBSD) and Transmission Kikuchi Diffraction(TKD) were performed for the Cu grain measurement with different copper native thickness before bonding, the non cross copper grain and void ratio at the bonding interface are increase due to surface morphology and the thickness of native copper oxide