P1. Advanced Packaging Technologies
Packaging configuration :
AI/HPC-driven advanced packaging architectures,Wafer-level packaging, Panel-level packaging, Flip chip packaging, Chip scale packaging, Fan-in/fan-out technologies, Multi-chip modules, High performance computing package, Fine pitch/high pin packaging solution, Co-Packaged Optics
Heterogeneous integration:
High performance computing heterogeneous integration (side-by-side integration, vertical stacking integration, chiplet, high bandwidth memory), Mobile heterogeneous integration (SiP, PoP, PiP etc.)
nD architectures :
Si/Glass /Organic interposer, Si bridge, Glass substrate, Advanced substrate, 3DIC, Hybrid bonding, TSV, TGV, Wafer bonding, and Other new technologies for advanced microelectronics
MEMS:
Microsystem packaging, New MST-enabled possibilities, New sensing and actuation mechanisms Multi-physics simulation of microsystems, New materials and processes for MST, Testing and calibration of microsystems, and Sensing, actuation and control circuits on microsystems.
P2. Power Electronics Packaging
Si/GaN/SiC/ Ga2O3 based power device and module (IGBT, MOSFET, HEMT, diode, IPM etc.), Power electronic module systems (inverter, converter, rectifier etc.);
Fabrication and assembly, Low-temperature bonding, Sintered Ag/Au bonding, Solid-Liquid Interdiffusion (SLID) bonding, Interconnection (wire-bonding, Cu clip bonding, chip embedded PCB etc.), Encapsulant material, Advanced cooling system, Ceramic substrate technologies (DBC, IMS, DPC, AMB etc.), High-performance passive components (super capacitor, inductor etc.), and Other related technologies.
P3.Interconnections & Nanotechnology
Interconnect technologies on all packaging levels (wire bonding, flip chip and TSV connections, first-level package etc.), Special emphasis on design and process of solder alternatives (ICP, ACP, ACF, NCP etc.), Under bump metallurgy, Electromigration, Micro-bump, Substrate technology, Novel enabling techniques, Electrical performance, and Environmental concerns.
P4.Design, Modeling, AI/Machine Learning Applications, and Testing
Design for reliability :
Electrical, optical, thermal and mechanical modeling & design; Component-, board- and system-level reliability, Interfacial adhesion strength, Advanced testing and measurement techniques, Advances in reliability test methods and failure analysis
Digital Twins :
Design of experiment, Design optimization, AI/machine learning applications, Design-on-Simulation technologies and tools, Design rule development, Virtual prototyping in product and/ or process design. AI/ML-driven design automation, Data-driven defect analytics
Chiplet System design :
From micro to macro simulation, Multi-physics simulation, and Thermal management (materials, heat sink, heat pipe, fan, thermal interface material, package-, board- and system level thermal design, measurement technology, two-phase heat transfer, air cooling/liquid cooling, immersion cooling, emerging cooling technology, thermoelectric cooling & generation etc.).
P5. Advanced Materials, Automatic Process & Assembly
Materials and automatic processes for 2D/3D microelectronics, Sustainable and low-carbon materials, Smart manufacturing with in-situ monitoring, and MEMS, sensor and microsystem packaging, including adhesives, encapsulates, lead free solders and alloys, thermal interface materials, high/low-k dielectrics and substrates, thin films, TSV drilling/etching, plating, low temperature bonding, assembly processes, and equipment for automation.
P6. Emerging Systems Packaging Technologies
Embedded passives & actives on substrates, Packaging solutions for RF-microwave, bioelectronics, automotive electronics, photonics, micro-LED, and medical electronics, Wearable/flexible technologies and Other novel system packaging technologies.
P7. Sustainable Technologies & Systems
Green and sustainable electronics, Net zero strategy/technology, Green packaging, Renewable energy, Energy storage, Sustainable substrate and PCB manufacturing, Energy-efficient system-level design for AI and data centers.