PAPER SUBMISSION      SUBMIT PAPER HERE

     Now in its 20th year, IMPACT 2025 embraces the theme “Energy-Efficient AI: From Cloud to the Edge” reflecting the industry’s growing emphasis on high-performance, low-power solutions. As AI applications continue to expand—from data centers to edge devices—the need for advanced PCB, IC substrates, heterogeneous integration, and packaging technologies has become increasingly critical.

    This milestone year marks not just a celebration of the past 20 years, but a bold step into the future, where IMPACT continues to lead, inspire, and drive innovation. Join us at IMPACT 2025 as we shape the next era of AI, semiconductor packaging, and PCB technology—powering a smarter, more sustainable world.


SCOPE OF PAPER SOLICITED 

*Scope covers from PACKAGING TO PCB; papers relevant to the below scopes are encouraged to submit but NOT limited to.

PACKAGING

P1. Advanced Packaging Technologies

Packaging configuration :

Wafer-level packaging, Panel-level packaging, Flip chip packaging, Chip scale packaging, Fan-in/fan-out technologies, Multi-chip modules, High performance computing package, Fine pitch/high pin packaging solution, Co-Packaged Optics

Heterogeneous integration:

High performance computing heterogeneous integration (side-by-side integration, vertical stacking integration, chiplet, high bandwidth memory), Mobile heterogeneous integration (SiP, PoP, PiP etc.)

nD architectures :

Si interposer, Organic interposer, Si bridge, Advanced substrate, 3DIC, Hybrid bonding, TSV, Wafer bonding, and Other new technologies for advanced microelectronics

MEMS:

Microsystem packaging, New MST-enabled possibilities, New sensing and actuation mechanisms Multi-physics simulation of microsystems, New materials and processes for MST, Testing and calibration of microsystems, and Sensing, actuation and control circuits on microsystems.

P2. Power Electronics Packaging

Si/GaN/SiC/ Ga2O3 based power device and module (IGBT, MOSFET, HEMT, diode, IPM etc.), Power electronic module systems (inverter, converter, rectifier etc.);

Fabrication and assembly, Low-temperature bonding, Sintered Ag/Au bonding, Solid-Liquid Interdiffusion (SLID) bonding, Interconnection (wire-bonding, Cu clip bonding, chip embedded PCB etc.), Encapsulant material, Advanced cooling system, Ceramic substrate technologies (DBC, IMS, DPC, AMB etc.), High-performance passive components (super capacitor, inductor etc.), and Other related technologies.

 

P3.Interconnections & Nanotechnology

Interconnect technologies on all packaging levels (wire bonding, flip chip and TSV connections, first-level package etc.), Special emphasis on design and process of solder alternatives (ICP, ACP, ACF, NCP etc.), Under bump metallurgy, Electromigration, Micro-bump, Substrate technology, Novel enabling techniques, Electrical performance, and Environmental concerns.

P4.Design, Modeling, AI/Machine Learning Applications, and Testing

Design for reliability :

Electrical, optical, thermal and mechanical modeling & design; Component-, board- and system-level reliability, Interfacial adhesion strength, Advanced testing and measurement techniques, Advances in reliability test methods and failure analysis

Digital Twins :

Design of experiment, Design optimization, AI/machine learning applications, Design-on-Simulation technologies and tools, Design rule development, Virtual prototyping in product and/ or process design, Digital Twins

Chiplet System design :

From micro to macro simulation, Multi-physics simulation, and Thermal management (materials, heat sink, heat pipe, fan, thermal interface material, package-, board- and system level thermal design, measurement technology, two-phase heat transfer, air cooling/liquid cooling, immersion cooling, emerging cooling technology, thermoelectric cooling & generation etc.).

P5. Advanced Materials, Automatic Process & Assembly

Materials and automatic processes for 2D/3D microelectronics, MEMS, sensor and microsystem packaging, including adhesives, encapsulates, lead free solders and alloys, thermal interface materials, high/low-k dielectrics and substrates, thin films, TSV drilling/etching, plating, low temperature bonding, assembly processes, and equipment for automation.

P6. Emerging Systems Packaging Technologies

Embedded passives & actives on substrates, Packaging solutions for RF-microwave, bioelectronics, automotive electronics, photonics, micro-LED, and medical electronics, Wearable/flexible technologies and Other novel system packaging technologies.

P7. Sustainable Technologies & Systems

Green and sustainable electronics, Net zero strategy/technology, Green packaging, Renewable energy, Energy storage

PCB

B1. Sustainable Materials and Technology

Green materials (lead-free, halogen-free, energy saving, recycling, reusing, reducing etc.), Low carbon emission process and manufacturing.

B2.Smart Manufacturing, Inspection and Testing

Modeling and simulation techniques, Intelligent control and manufacturing, Automatic control system and Process integration. Feature testing and verification, Inspection (AOI, non-destructive testing etc.), Signal and power integrity measurement and evaluation, Failure mechanism analysis.

B3. HDI PCB, IC Substrate and FPC Technology

SAP and m-SAP process (Fine pitch line ), Build-up board, Micro-vias and copper plating process, Multilayer core and coreless, Advanced flex, Chip on flex and Rigid-flex.

B4. Advanced and Emerging Technology

High speed transmission technology and materials for AI and sever applications, High frequency circuitry technology and materials for mini-wave applications, High power and thermal dissipation, Embedded devices, Photo and non-photo dielectric for high density circuits and advanced package substrate materials and process.







IMPORTANT DATE

✔ Online Submission Opens

     Mar. 17, 2025

✔ Abstract Submission Deadline

     June 20, 2025 

✔ Acceptance Notification

     Jul. 18, 2025

✔Advanced Program Online 

      Aug. 15 2025

     Kick off registration

      end of Aug. 2025

✔ Full Paper Submission

      Aug. 22, 2025














 

 


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