Oral Sessions


S1: Packaging Innovations by SPIL

Oct. 26, 2022 13:10 PM - 15:10 PM

Room: R504a
Session chair: YP Wang,SPIL/KM Chen,UMC

Investigation of Moisture-Induced Warpage of Chip-on-Wafer in 2.5D IC Package
發表編號:S1-1時間:13:10 - 13:40

Invited Speaker

Inderjit Singh, Sr. Director,AMD

2.5D multi-chip packaging technology places multiple SoC dies and chiplets on a silicon interposer wafer so that better interconnect density and performance can be achieved. Individual chips are bonded through micro-bumps on a silicon interposer forming a chip-on-wafer (CoW) module. Excessive moisture-induced warpage of CoW die could lead to C4 bump failure in on-substrate assembly process. The risk is even higher in a case where a CoW module has stacked dies like HBM or SoIC, which are built with several kinds of polymer materials, on top of the silicon interposer. A two-step finite element modeling was performed: 1) moisture diffusion within polymer materials in a CoW module was simulated; 2) then hygro-thermomechanical simulation was performed to predict the warpage during reflow. Absorption / desorption test and CHS measurement were performed to characterize the moisture properties of the polymetric materials in a chip-on-wafer module. Different HBM structures, material overflow of the polymer which the stacked dies were built with, and storage humidity condition were simulated and discussed.

Advanced Package Platform "VIPACK" - FOSiP
發表編號:S1-2時間:13:40 - 14:10

Invited Speaker

Jeff Kuo, Corporate R&D / Wafer Level SiP, ASE

- Package Innovation Driven by Market
- Roadmap of FOSiP
- FOSiP Technology Building Blocks
- Next Innovation of Package Portfolio
- Summary

Development of Hybrid Bonding Technology, Innovative Applications and Platform for 3D IC
發表編號:S1-3時間:14:10 - 14:40

Invited Speaker

Kuan-Neng Chen, Chair Professor, National Yang Ming Chiao Tung University(NYCU)

1. Introduction
2. Hybrid Bonding Technology
3. Innovative Applications based on 3D Stacking Technology
4. Innovative Monolithic 3D IC
5. Conclusions

Challenges and solutions for IC substrates
發表編號:S1-4時間:14:40 - 15:10

Invited Speaker

Matsumoto Masaaki, General Manager of Semiconductor Materials R&D center, Panasonic

End-use applications ultimately dictate the construction and the properties requirements for IC substrates. Panasonic Electronic Materials has a portfolio of innovative and high reliability substrate materials, including copper-clad laminates and prepregs to meet the latest industry challenges. At this session, we will review our materials, technology, and development direction.


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