Oral Sessions


S14: Intel Modular Data Center Platform Design Architecture

Oct. 27, 2022 13:10 PM - 15:10 PM

Room: R504b
Session chair: George Chen, Director, Intel

Sustainable Computing: Intel Data Center Modular System
發表編號:S14-1時間:13:10 - 13:40

Invited Speaker

Gerry Juan, Senior Staff Engineer, Intel

Reducing total carbon footprint on data center system; PCB and design strategy assessment; Intel Project Blue Glacier (DC-MHS) Standardization of data center building blocks; High-speed Input/Output(HSIO) Interconnect Solution

Advanced cooling solution implementation for supporting high Thermal Design Power module
發表編號:S14-2時間:13:40 - 14:10

Invited Speaker

Jay Wu, Staff Engineer, Intel

The ever-increasing need for compute performance is driving a sustained raise in the power and power density of IT equipment and components. This requires a more efficient cooling technology than achieved by air. Liquids are more efficient in dissipating heat than air, and immersion cooling is a liquid cooling technology that is currently gaining an increased interest from the industry. In immersion cooling, the IT equipment is fully submerged in a dielectric liquid that acts as the efficient cooling medium. This session discusses pros and cons with immersion cooling and show cases thermal characterization data of Intel Xeon CPUs in both single-phase and two-phase immersion cooling.

Intel System Power Design Validation for Total cost of ownership (TCO) Optimization
發表編號:S14-3時間:14:10 - 14:25

Invited Speaker

Kevin Liang, Data Center Platform Application Engineer, Intel

Intel System Power Design Validation(SPDV) provide a TCO optimization with system benchmarks. Since Intel implemented Fully Integrated Voltage Regulator (FIVR) that help resolve core noise issue and MB VR was validated by checking V(t) using CPU VR Test Tool (VRTT). This approach include a real system with real CPUs can provide system performance review to achieve customer TCO reduction and power design optimization

Intel Probe-on-Pin Power Delivery Network Characterization
發表編號:S14-4時間:14:25 - 14:40

Invited Speaker

Bryant Tsai, Data Center Platform Application Engineer, Intel

Intel Probe-On-Pin provides the methodology to measure the Power Delivery Network Characterization with a flexible approach to identify risks from the board level PDN impedance without complicated instrument setups.

Intel ® Automatic-In-board Characterization for Module Design Robustness
發表編號:S14-5時間:14:40 - 15:10

Invited Speaker

Jimmy Hsu, Principal Engineer, Intel

Intel ® Automatic In-Board Characterization (AIBC) is established for fast, robust, and accurate printed circuit board (PCB) characterization. It can provide comprehensive impedance analysis of thousands signals for the design quality check and PCB manufacture management. The insertion loss can be efficiently analyzed for risk evaluation by comparing with reference platform. This approach can help customers not only verify PCB technologies, such as back drill impact, but also make the right decision based on trade off study between the performance and cost.


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