Jimmy Hsu, Gary Hung, Jim Tseng, Brian Ho, Lemon Lin, Thonas Su
When Intel data center platform transits generation by generation, Central Processing Unit (CPU) pin pitch is reduced to accommodate thousands of signals by more high-speed Input/Output (HSIO) and more Double Data Rate (DDR) channels. Meanwhile, PCI-Express revision is transiting from 16 GT/s to 32 GT/s data rate and the lower loss interconnect budget is required to achieve higher operation frequency. To meet the tighter electrical requirement, designers need to adopt some advanced PCB process technologies and there are a lot of challenges to PCB design and suppliers manufacture quality management.
PCB material is from low loss to ultra-low loss to extend routing length for PCIe Express 32 GT/s, and PCB cost increases significantly by material upgrade with smooth copper foil. PCB layer count increases from 12 layers to 16 layers for more signals routing, and board thickness increases from 76mil to 100mil. The via drill size is reduced from 10 mil to 8 mil for more signal fan-out in CPU area and this leads higher drill aspect ratio from 8 to 12.5 by smaller via drill size in thick board. The back drill process is required to mitigate the resonance by the via stub for high-frequency application. Meanwhile, PCB manufacture variation need to be considered by more suppliers’ competition for cost-effective solution.
Intel ® Automatic In-Board Characterization (AIBC) is developed for fast, robust, and accurate PCB characterization and enabled for the testing services of Intel data center customers support to validate design and manufacture quality for board robustness. AIBC can benefit layout and manufacture quality check, channel loss risk assessment, manage PCB manufacture variation and verify PCB technologies impact, such as back drill and PCB material selection.
The early visibility by AIBC finding is critical to improve design quality by reducing down-range risk and improve product robustness. Some examples are shown to demonstrate ABC design quality check and identify customer design issues efficiently, such as abnormal higher insertion loss by missed back drill design and higher impedance by routing close to the mechanical holes.
Customers also adopted AIBC to manage PCB fabrication quality and identifies suppliers’ quality inconsistencies, including the area or layer dependency within one sample, samples variation by one PCB shop, and difference among various PCB shops. In this paper, the loss variation by two PCB shops is more than 20%. This PCB manufacture impact is critical to the electrical performance, and this variation induces more challenges in the system validation. According to this AIBC findings, designers can identify these issues efficiently to improve PCB manufacture quality, such as oxide treatment, lamination, PCB etching etc.
Through full scope in-board impedance and loss measurement, AIBC is very helpful to capture the design defects for improvement of the next PCB re-spin for customer time-to-market. Meanwhile, AIBC can benefit customers to manage PCB fabrication quality, such as PCB drilling, etching quality and manufacture variation, and identifies PCB suppliers’ quality inconsistencies in products.