Sessions Index

Bio:

Matt Kelly is CTO and Vice President of Technology Solutions at the Global Electronics Association, where he leads global technology strategy and initiatives advancing the electronics industry. Over the past six years, he has built and led programs spanning advanced electronic packaging, next-generation design, digital manufacturing, AI, and standards modernization, working with industry across North America, Europe, and Asia. Matt brings more than 25 years of electronics industry experience, including senior technology and engineering leadership roles at IBM. He holds 25 patents, has authored more than 120 publications, and has received numerous industry awards from NAM, ASM, SMTA, IPC, and IBM. Matt is a licensed Professional Engineer with a Chemical Engineering degree from McMaster University and an MBA in Strategic Management from Wilfrid Laurier University.

Abstract:

Opening remarks will highlight the continued evolution of Advanced Electronic Packaging and the convergence of semiconductor packaging, substrates, PCBs, and system-level assembly. The remarks will focus on the critical package-to-PCB interface and connecting the supply chain to identify emerging technology gaps, challenges, and needs that can inform next-generation guidelines and standards.

 

Bio:

Dr. MC Hsieh received his Ph. D. degree in aeronautics and astronautics engineering from the National Cheng Kung University, Taiwan in 2005. He joined STATS ChipPAC in 2011 and is currently working as the Director in Technology Marketing Division. Prior to join STATS ChipPAC, he was a principal researcher in Industrial Technology Research Institute (ITRI) in Taiwan. He has more than 20 years of industrial experience in semiconductor packaging area, includes flip chip, wafer level package, SiP, 2.5D/3D advanced package, thermal-mechanical simulation/characterization, failure analysis and reliability design. He has authored and co-authored over 70 scientific publications for journal and conference papers in the fields of semiconductor packaging, simulation & technology marketing.

Abstract:

Driven by the rapid scaling of AI/HPC, the semiconductor industry has shifted toward heterogeneous and chiplet integration, includes 2D large fcBGA-MCM, 2.1D/2.5D integration and 3D packaging solutions. This presentation will highlight the distinct advantages of these advanced packaging and substrate integrations as well as OSAT’s perspective from 2D technologies to 3D technologies.

 

Bio:

Dr. Wang received his master’s and doctoral degrees in Chemical Engineering from National Taiwan University. From 1992 to 1997, he worked at the Industrial Technology Research Institute (ITRI). Dr. Wang joined Unimicron in 1997 and dedicated the next three years to IC substrate development. After Unimicron acquired Subtron in 2000, he transferred to Subtron and served as Vice President of Engineering. In this role, he led his team in developing substrates for RF and LED applications. Dr. Wang returned to Unimicron in 2016 and began leading the R&D Department of the PCB II Business Division as Senior Vice President. He and his team have focused on PCB development for high-speed, high-frequency, and high-power applications. He currently serves as VCTO and oversees the advanced technologies development for next generation of products.

Abstract:

In response to the rapid advancement and explosive growth of AI and HPC, the technologies and ecosystem of IC substrates and PCBs are undergoing changes essentially. The semiconductor-like evolution of substrates and the substrate-like evolution of PCBs are becoming major trends, and the industry must prepare early to address the challenges ahead.

 

Bio:

Ander Hsieh joined Wistron in 2000 and currently serves as Deputy Executive Director of Advanced Process Technology & Material Characterization. He leads global teams in advanced SMT process development, DfX review, and material failure analysis.

Abstract:

As larger SoCs and HBM-stacked BGAs are placed on system PCBs, increased package size and weight create SMT assembly challenges, including solder-joint fatigue, board warpage, placement drift and reflow defects. This talk focuses on system-level SMT package-to-board solutions: co-design rules, materials (underfill, board stiffeners), placement and reflow strategies (vacuum nozzles, sequential reflow, fixturing), and practical validation methods to improve reliability and manufacturability for high-volume production.

 

Bio:

E. Jan Vardaman is president and founder of TechSearch International, Inc., which has provided market research and technology trend analysis in semiconductor packaging since 1987.  She is the author of numerous publications on emerging trends in semiconductor packaging and assembly. She is a senior member of IEEE EPS and is an IEEE EPS Distinguished Lecturer and received the Distinguished Achievement Certificate for Technical Leadership and Expertise in May 2024. She received the President’s Award in 2026 from the Global Electronics Association (GEA) for her contributions to the electronics industry. She received the IMAPS GBC Partnership award in 2012, the Daniel C. Hughes, Jr. Memorial Award in 2018, the Sidney J. Stein International Award in 2019, and she is an IMAPS Fellow. She served on the IEEE CPMT Board of Governors for two terms. Before founding TechSearch International, she served on the corporate staff of Microelectronics and Computer Technology Corporation (MCC), the electronics industry’s first pre-competitive research consortium. She
received her M.A. from University of Texas, in 1981.

Abstract:

The discussion session will build on the speaker presentations to explore the key challenges, gaps, and solutions across advanced packaging, substrates, PCBs, and board-level assembly for AI-driven HPC systems. Participants will discuss where greater industry alignment and collaboration are needed to enable next-generation package-to-board integration.