Sessions Index

S32 【S32】Glass Packaging

Oct. 23, 2025 13:00 PM - 15:00 PM

Room: 504 a, TaiNEX 1
Session chair: Tetsuya Onishi/Grand Joint Technology

Glass Package Trends &Technology: 1. Glass PKG history log with technical papers, conference, and trend 2. Glass PKG applications 3. Glass PKG strong area 4. Glass TGV metallization
發表編號:S32-1時間:13:00 - 13:30

Invited Speaker

Speaker: Managing Director, Tetsuya Onishi, Grand Joint Technology


Bio:

Tetsuy Onishi is the managing director of process engineering consulting company Grand Joint Technology Ltd (G.J.Tech).
  Older chemical background semiconductor packaging Japanese engineer* involved in materials, design, process, quality, reliability & analysis for bare die products, COB device, IC packaging, COF, LCD module, memory Modules, EL products, LED packaging & lighting products, IR device, gas sensor device, RF device, Cu TGV metallization & special chemicals. He has been researching the Glass PKG for more than 10 years. T. Onishi received the “Die Products Industry Achievement award“ at the 8th Annual International KGD Packaging and Test Workshop 2001, in Napa, California. He is a senior member at the Japan Institute of Electronics Packaging (JIEP) and a director of Nagano Jisso Forum Japan.
*45-years in electronics assembly packaging field life with failure analysis +packaging process improvement



Abstract:





For applications such as high-speed transmission, 5G communication, HPC for Ai, and new optical devices, a substrate that does not absorb moisture, has small CTE, and has less warpage, the Glass core is required. This presentation will show Glass PKG technologies trends and key technologies.

Keywords— “Glass core ”, “Glass PKG application”, “TGV”




 
Scaling the Square: Enabling Endless Heterogeneous Integration, From Cost-Driven to Cutting Edge
發表編號:S32-2時間:13:30 - 14:00

Invited Speaker

Speaker: Sr. Director, Frank Su, Lam Research


Bio:

  Frank Su brings a wealth of experience working on multiple industry products in the semiconductor capital equipment business, both in FEoL and BEoL. As the head of worldwide business development, panel product line, at Lam Research, Frank helps set the strategic path for continued market growth to increase penetration with various customer segments for this expanding technical area. Prior to his current role.
  Frank worked for over 25 years in different positions within sales, marketing, and general management. As part of the initial team at SEMSYSCO Asia where he served as managing director, Frank helped build the infrastructure to support customers across the region. He graduated from National Taiwan University with his M.S. degree in Industrial Engineering. Frank also received a M.S. degree in Business Administration of Technology Management from National Tsing Hua University.



Abstract:








 
Enabling the Advanced Packaging industry with HVM solutions for next generation glass core substrates
發表編號:S32-3時間:14:00 - 14:30

Invited Speaker

Speaker: Vice President, Christian Buchner, SCHMID


Bio:

Education

Ruprecht-Karls University of Heidelberg Diploma in Physics, 1994

PhD thesis at the Institute for Solid State Physics, Heidelberg

Focus on research in solid-state physics 

Professional Experience

Since 2008

Vice President, Schmid Group, Freudenstadt, Germany

Executive responsibility for the business units Photovoltaics (PV), Glass Technology, and Business Development at the group's headquarters. Leading global strategic initiatives, innovation programs, and market expansion.

 2004 – 2008

Chief Executive Officer (CEO), Schmid Technology GmbH, Freudenstadt, Germany

Managing director of a Schmid Group subsidiary. Oversaw the development, production, and global sales of inkjet applications and related high-tech equipment.

1998 – 2004

Chief Executive Officer (CEO), Heidelberg Instruments, Heidelberg, Germany

Full responsibility for corporate strategy, product development, and international sales of laser lithography systems for the semiconductor and microtechnology sectors.

1994 – 1998

Sales Director, Heidelberg Instruments, Heidelberg, Germany

Built and led the international sales team for laser lithography solutions targeting the semiconductor industry. Key interface for R&D collaborations and strategic customers.



Abstract:





       The relentless demand for higher performance, miniaturization, and increased integration density in advanced packaging is driving fundamental shifts in IC substrate and AI server board manufacturing. The SCHMID Group’s glass substrate solutions introduces a high-volume manufacturing (HVM) platform specifically designed for next-generation glass-core substrates, enabling ultra-fine features, robust vertical interconnects, and excellent thermal and mechanical properties.
       This presentation highlights the comprehensive process integration of InfinityBoard, with a particular focus on Bottom-Up Plating—a critical technology for achieving reliable, high-aspect-ratio via metallization in glass substrates. The process begins with Through-Glass Via (TGV) formation, utilizing TRUMPF’s ultrashort-pulse laser drilling, followed by hydrofluoric acid etching to produce clean, debris-free sidewalls and exceptional aspect ratios. Metallization of the TGVs is achieved exclusively through bottom-up electroplating, delivering superior via fill quality for holes with diameters as small as 10 µm and aspect ratios exceeding 1:50. This capability is essential for product reliability and opens the door to more advanced design rules for the redistribution layer (RDL).




 
Measuring Progress on Glass Substrates
發表編號:S32-4時間:14:30 - 15:00

Invited Speaker

Speaker: President, Jan Vardaman, TechSearch International


Bio:

  E. Jan Vardaman is president and founder of TechSearch International, Inc., which has provided market research and technology trend analysis in semiconductor packaging since 1987. She was the editor of Recent Developments in Tape Automated Bonding published by IEEE Press. She is the co-author of How to Make IC Packages (by Nikkan Kogyo Shinbunsha), a columnist with Printed Circuit Design & Fab/Circuits Assembly, and the author of numerous publications on emerging trends in semiconductor packaging and assembly. She served on the NSF-sponsored World Technology Evaluation Center (WTEC) study team involved in investigating electronics manufacturing in Asia and on the U.S. mission to study manufacturing in China. She is a senior member of IEEE EPS and is an IEEE EPS Distinguished Lecturer. She received the IMAPS GBC Partnership award in 2012, the Daniel C. Hughes, Jr. Memorial Award in 2018, the Sidney J. Stein International Award in 2019, and she is an IMAPS Fellow. She is a member of MEPTEC, SMTA, and SEMI. She serves on the JEDEC Task Force JESD-94 Working Group Application Specific Qualification Using Knowledge Based Test Methodology. She has served on the IEEE CPMT Board of Governors for two terms. Before founding TechSearch International, she served on the corporate staff of Microelectronics and Computer Technology Corporation (MCC), the electronics industry’s first pre-competitive research consortium. She received her M.A. from University of Texas, in 1981.



Abstract:








 


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