Sessions Index

S22 【S22】ISMP-Reliaiblity and Thermal Management of Advanced Packages

Oct. 22, 2025 15:30 PM - 17:30 PM

Room: 504 a, TaiNEX 1
Session chair: Taek-Soo Kim/KAIST, Daeil Kwon/Sungkyunkwan University

High thermal conductivity materials for thermal management in electronics
發表編號:S22-1時間:15:30 - 15:54

Invited Speaker

Speaker: Assistant Professor, Joon Sang Kang, KAIST


Bio:

Joon Sang Kang is an assistant professor in the Department of Mechanical Engineering at KAIST. He received his B.S. in Mechanical Engineering from Inha University, followed by an M.S. from KAIST and a Ph.D. from the University of California, Los Angeles (UCLA). His research focuses on the development of high thermal conductivity materials, thermal management in electronic devices, and thermal characterization for advanced electronic packaging technologies. He has published papers in prestigious journals, including Science, Nature Electronics, Advanced Materials, and Nano Letters.



Abstract:





  Thermal management in electronics is increasingly critical for enhancing computing power and reducing device power density. Recently discovered cubic boron arsenide (BAs) exhibits ultrahigh thermal conductivity (1500 W/mK), holding promise for heat spreading and packaging applications. However, integrating BAs as a heat spreading layer for transistors necessitates device integration and heterostructure fabrication.
  In this talk, heterostructure devices combining various materials with BAs were fabricated using an e-beam evaporator and plasma bonding technique. The cooling performance and hot spot temperature of each device were evaluated using ultrafast pump-probe methods and Raman spectroscopy. Our findings indicate efficient interfacial energy transport between different materials and BAs, resulting in a significant reduction in transistor temperature.
  Comparative analysis with conventional heat spreading materials like SiC and diamond reveals that BAs heterostructures exhibit minimal temperature rise during transistor operation. These results position BAs as the most promising material for thermal management in semiconductor devices.




 
Understanding Thermally Induced Failures in Packaging Interconnects via Micro-scale Deformation Analysis
發表編號:S22-2時間:15:54 - 16:18

Invited Speaker

Speaker: Principal Researcher, Tae-Ik Lee, KITECH (Korea Institute of Industrial Technology)


Bio:

  Tae-Ik Lee is a principal researcher in the Advanced Packaging Integration Center (APIC) of Korea Institute of Industrial Technology (KITECH). He received his B.S., M.S., and PhD, in Mechanical Engineering from KAIST. His research focuses on understanding thermo-mechanical properties of micro/nano systems seeking for bonding & reliability solutions for advanced electronic devices. Major applications include semiconductor packages and displays. He has published 44 journal papers with (>1700 citations, 19 h-index).



Abstract:





As semiconductor packaging advances toward miniaturization and high integration, thermo-mechanical reliability has become increasingly critical due to heat generation from high-performance devices. The complex physical properties and limited knowledge of mechanical stability at heterogeneous interfaces necessitate precise analysis of thermal stresses and deformations. To improve reliability, understanding the actual mechanical behavior under thermal conditions during packaging and operation is essential. Utilizing micro-scale digital image correlation (DIC) enables detailed visualization and quantification of surface deformations. This presentation showcases micro-2D-DIC techniques for local deformation analysis of packaging interconnects, including solder joints and epoxy-bonded interfaces. The findings demonstrate that early detection of thermo-mechanical failures is possible through these measurements. Additionally, thermomechanical properties such as the coefficient of thermal expansion and glass transition temperature are measured using 3D-DIC. Combining these insights enhances understanding of material behaviors and stress-related deformations in real operating environments, offering strategies to mitigate warpage issues in next-generation semiconductor packages.




 
Synergistic metallization on advanced packages for reliable edge AI
發表編號:S22-3時間:16:18 - 16:42

Invited Speaker

Speaker: Assistant Professor, Hanwool Yeon, GIST


Bio:

  Hanwool Yeon is an assistant professor in the Department of Materials Science and Engineering (MSE) at GIST. He received his B.S. (2009) and Ph.D. (2016) degrees in MSE from Seoul National University. He then conducted postdoctoral research for 4.5 years under Prof. Jeehwan Kim at the Massachusetts Institute of Technology. In 2022, he joined GIST as a faculty member. His research aims to realize energy-efficient and reliable edge Ai hardware through innovative back-end-of-line (BEOL) metallization technologies. Specifically, his group focuses on (1) BEOL-embedded devices, (2) BEOL conductors, and (3) advanced packages beyond the BEOL.



Abstract:





  Advanced packaging (AVP)‒the compact integration of disaggregated chips without long wires and with bondable interconnects-has become an indispensable technology in the artificial intelligence (Ai) era. AVP forms short and dense interconnections between memory and processors, facilitating fast and energy-efficient edge Ai computing. However, AVP-based compact Ai hardware faces crucial reliability challenges, including (1) poor heat dissipation, (2) copper (Cu) contamination, and (3) electromagnetic interference (EMI) in integrated chips. Addressing these challenges requires innovative advancements in AVP materials. In this talk, I will present my group’s efforts to develop highly reliable Ai hardware by establishing novel metallization strategies, enabling the discovery of synergistic material combinations with metals. First, for organic interposers, we have developed Cu metallization technologies with self-assembled monolayers (SAMs) to enhance reliability under thermal and electrical stress. Second, for EMI shielding, we have demonstrated ultrathin metal-MXene hybrid shields that achieve unprecedented high performance and provide compact chip passivation. I will elaborate on the underlying mechanisms of our metallization technologies, referred to as SMART metallization.




 
Opportunities in Advancing Packaging Technologies for Soft Electronics
發表編號:S22-4時間:16:42 - 17:06

Invited Speaker

Speaker: Professor, Seung-Kyun Kang, Seoul National University


Bio:

  Seung-Kyun Kang is an associate professor in the Department of Materials Science and Engineering at Seoul National University (SNU) and Head of the Materials Analysis Center at the Research Institute of Advanced Materials. He earned his BS (2006) and PhD degrees (2012) from SNU, specializing in mechanical properties of multiscale materials. He conducted postdoctoral research on bioelectronics under Prof. John A. Rogers at the University of Illinois at Urbana-Champaign (UIUC) and Northwestern University. Before joining SNU in 2019, he was an assistant professor at the Korea Advanced Institute of Science and Technology (KAIST). Kang has published over 80 peer-reviewed papers in Nature, Science Advances, and Advanced Materials. His research spans materials science, electronics, mechanics and bioengineering, focusing on wearable, implantable and bioresorbable medical devices, neuromorphic devices and soft robotics. Beyond applications, he investigates mechanical failure analysis, corrosion, degradation and mechanical testing of advanced materials.



Abstract:





     The era of flexible and stretchable electronics has drawn significantly closer with the commercialization of foldable and flexible devices such as flip and foldable phones, intensifying global technological competition. The ultimate vision for next-generation systems is to achieve ultra-thin, lightweight formats that approximate epidermal-level electronics, and further, to advance toward miniaturized devices capable of implantation within the human body. Such progress requires moving beyond single-element devices or simple wiring toward the integration of heterogeneous soft and hard components, accompanied by new packaging strategies tailored to novel form factors to ensure long-term mechanical reliability. This presentation will provide an overview of packaging technologies for ultra-soft and flexible electronics, addressing critical aspects across design, testing, and system integration. In particular, I will discuss interconnection and wiring technologies that simultaneously sustain flexibility and electrical conductivity, as well as three-dimensional structural design strategies that mitigate stress concentration during deformation. As the overall thickness of devices continues to decrease, encapsulation approaches become increasingly critical—not only to ensure environmental stability and biocompatibility but also to preserve functionality over long-term operation. Recent advances in barrier layer technologies and thin-film encapsulation will also be highlighted as essential enablers for robust, skin-like and implantable electronic systems. By examining these advances from the perspective of packaging and encapsulation, this talk will explore both the challenges and the emerging opportunities in realizing the next generation of flexible, stretchable, and implantable electronics.




 
Analysis of microstructure effect on Cu-Cu bonding interface based on Crystal plasticity theory
發表編號:S22-5時間:17:06 - 17:30

Invited Speaker

Speaker: Associate Professor, Eun-Ho Lee, Sungkyunkwan University


Bio:

  Eun-Ho Lee is currently an Associate Professor with the School of Mechanical Engineering at Sungkyunkwan University, Korea. He worked at the Manufacturing Lab of General Motors R&D (Warren, MI) and the Package Team at Samsung Electronics before joining Sungkyunkwan University. His research interests include intelligent manufacturing, semiconductor/packaging manufacturing, and reliability.



Abstract:





  This presentation explores how grain orientation and grain size affect Cu-Cu bonding interface behavior. Using crystal plasticity theory and ABAQUS simulations, we modeled copper's microstructure, including its FCC structure, slip systems, and diffusional creep driven by pressure gradients. Simulations showed that grain orientation significantly impacts bonding interface deformation and shape change, with different orientations dominating during bonding formation versus grain growth. This complexity suggests advantages for random grain structures. We also found that fine grains store more free energy and can reduce the grain orientation effect. All simulation results were experimentally validated.




 


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